5  Design of an Analog-to-Digital Converter

Authors
Affiliation

Anirudh Harish Bhat

Hochschule Bremen

Leanne Maria Miranda

Das Sourendu

6 Introduction

In today’s digital world, Analog-to-Digital Converters (ADCs) are everywhere—from smartphones and medical devices to industrial sensors and audio systems. They convert real-world analog signals, like sound and motion, into digital data that computers can understand.

One of the most powerful types of ADCs is the Delta-Sigma Modulator (DSM), known for its high accuracy and noise reduction. Unlike traditional ADCs, DSMs use oversampling and feedback loops to improve signal quality, making them ideal for applications that require precision, such as communication systems, and high-fidelity audio processing.

6.1 What This Document Covers

This work explores the design, implementation, and analysis of Delta-Sigma ADCs through both theory and hands-on experimentation. We will cover:

How ADCs work, including key components like filters, samplers, and quantizers. Types of ADCs, including Flash, Successive Approximation, and Delta-Sigma. The practical design of a Delta-Sigma ADC system, integrating: -ADXL335 Accelerometer for motion sensing. -ADS1115 ADC for signal conversion. -ESP8266 Microcontroller for data processing and display.

Circuit design and simulations using MATLAB/Simulink, LTSpice, and Xschem to model and test ADC performance along with findings and challenges have been documented.

6.2 Why Delta-Sigma ADCs?

Delta-Sigma ADCs stand out because they filter out noise, enhance precision, and are cost-effective. They use a clever trick—oversampling—to capture more signal details than conventional ADCs, making them ideal for low-frequency, high-accuracy applications.

6.3 How This Document is Organized

This document is structured to take you from the basics of ADCs to the design, simulation, and practical implementation of Delta-Sigma ADCs. You’ll find:

-Introduction – Understanding ADCs and why Delta-Sigma is special. -Design and Implementation – Hands-on system design using sensors, microcontrollers, and ADCs. -Circuit Simulations – Testing and analyzing ADC performance in MATLAB, LTSpice, and Xschem. -Applications and Challenges – Real-world uses and common design hurdles.

6.4 Analog Signal Processing System

6.4.1 System Overview

This documentation presents the design and implementation of a Delta Sigma Modulator. The system successfully captures real-time acceleration data, converts it into digital form, processes it using a microcontroller, and visualizes the results on a screen. The primary focus was the ADC subsystem, particularly the custom Delta-Sigma Modulator (DSM) integrated within the ADS1115, replacing the standard comparator with a 5T OTA in the design of 1st order and 2nd order DSM.

The system comprises the following components: - ADXL335 Accelerometer for motion sensing. - ADS1115 Analog-to-Digital Converter (ADC) for high-resolution signal conversion. - ESP8266 Microcontroller for processing and data transmission. - Custom Delta-Sigma Modulator (DSM) with a 5T Operational Transconductance Amplifier (OTA) to replace ADC.

6.4.2 Block Diagram of the System

flowchart LR
  A["Accelerometer"] --> B[/Analog to Digital convertor/] --> C["Microcontroller"]

The system consists of three main blocks: an accelerometer, an analog-to-digital converter (ADC), and a microcontroller. The accelerometer detects motion and generates analog voltage signals corresponding to acceleration in three axes (X, Y, and Z). These analog signals are then fed into the ADC, which converts them into a digital format for further processing. Finally, the microcontroller receives the digitized data, processes it, and transmits the results for visualization or further analysis.

6.4.2.1 System Implementation on Breadboard

The designed system has been successfully assembled on a breadboard, as shown in the image below.

Breadboard

The hardware components are interconnected according to the block diagram, ensuring proper signal flow and data acquisition. The accelerometer, ADC, and microcontroller are wired to facilitate seamless communication. This physical setup validates the theoretical design and allows for real-time testing and evaluation.

This setup ensures high-precision motion sensing, making it suitable for applications such as vibration monitoring, tilt sensing, and real-time motion tracking.

6.5 Functional Blocks and Interfaces of our System

6.5.1 Accelerometer (ADXL335)

The ADXL335 is a low-power, three-axis MEMS accelerometer by Analog Devices, capable of measuring both static and dynamic accelerations such as gravity, motion, shock, or vibration.

ADXL335
  • Basic Functionality: Measures acceleration in X, Y, and Z axes.
  • Output: Analog voltage signals proportional to acceleration.
  • Interfacing: Connected to ADS1115’s analog input channels and outputs interfaced with ADS1115.
  • Key Features:
Feature Value
Operating Voltage 1.8V – 3.6V
Operating Current 350μA (typical)
Sensing Range ±3g (Full Scale)
Temperature Range −40°C to +85°C
Sensing Axis 3 Axis
Sensitivity 270–330mV/g
Shock Resistance Up to 10,000g
Dimensions 4mm x 4mm x 1.45mm

6.5.1.1 MEMS Accelerometer Working Principle

MEMS acc

A MEMS (Micro-Electro-Mechanical System) accelerometer is a tiny structure built on a silicon wafer, suspended by polysilicon springs. When the sensor experiences acceleration along the X, Y, and/or Z axes, the suspended structure moves, causing a change in capacitance between fixed plates and the attached plates. This change is proportional to the acceleration, and the sensor converts it into an analog output voltage.

6.5.2 Analog-to-Digital Converter (ADS1115)

  • Reasons why we use the ADC as an intermediate block between the Accelerometer and the Microcontroller:
    • Higher Resolution: ADS1115 provides more accurate readings than the ESP8266’s built-in ADC.
    • Lower Noise: ADS1115 minimizes noise interference for cleaner data.
    • Programmability: ADS1115 offers flexible configuration for optimal performance.
    • Reduced ESP8266 Load: Offloads ADC tasks, freeing up resources for other functions.
    • Simplified Interfacing: I2C communication simplifies wiring and reduces pin count.

ADS1115
  • Function: Converts the analog signal from ADXL335 to a 16-bit digital output.
  • Internal Components:
    • Multiplexer (MUX): Selects input channels
    • Programmable Gain Amplifier (PGA): Enhances signal resolution
    • Delta-Sigma ADC: Converts analog to digital signal
    • Comparator: Used for threshold-based signal analysis
  • Modes of Operation:
    • Continuous conversion mode
    • Single-shot conversion mode (low-power optimization)

ADS1115 Board - Specifications: - Resolution: 16-bit - Input range: ±256 mV to ±6.144 V - Data rate: Programmable up to 860 samples per second - Low power consumption: 150 µA (typical) - Integrated voltage reference and oscillator

ADS1115 Board2 - Interfacing: Communicates with ESP8266 via I²C protocol.

6.5.3 Microcontroller (ESP8266)

ESP8266
  • Function: Processes the digitized signal and transmits data to the laptop.
  • Programming Interface: Arduino IDE with I²C communication.
  • Specifications:
    • 80 MHz CPU frequency
    • 96KB RAM
    • SPI/I2C/UART interfaces
  • Reference: ESP8266 Documentation 1 | ESP8266 Documentation 2

6.5.4 IDE Code Execution (Arduino IDE)

The following code was executed through Arduino IDE to initialize the system, acquire signals from the accelerometer, data conversion them by the ADC, process through Microcontroller and display the results on the laptop.

#include <ADS1115_WE.h>
#include <Wire.h>

#define I2C_ADDRESS 0x48

ADS1115_WE adc = ADS1115_WE(I2C_ADDRESS);

void setup() {
    Wire.begin();
    Serial.begin(9600);

    if (!adc.init()) {
        Serial.println("ADS1115 not connected!");
        while (1);
    }

    adc.setVoltageRange_mV(ADS1115_RANGE_6144);
    adc.setCompareChannels(ADS1115_COMP_0_GND);
    adc.setMeasureMode(ADS1115_CONTINUOUS);
    adc.setConvRate(ADS1115_128_SPS);

    Serial.println("ADS1115 Initialization Complete");
    Serial.println("Starting Continuous Measurement...");
    Serial.println("All values are in volts.\n");
}

void loop() {
    Serial.print("Ax: ");
    Serial.print(readChannel(ADS1115_COMP_0_GND));

    Serial.print("   Ay: ");
    Serial.print(readChannel(ADS1115_COMP_1_GND));

    Serial.print("   Az: ");
    Serial.print(readChannel(ADS1115_COMP_2_GND));

    Serial.println();
    delay(1000);
}

float readChannel(ADS1115_MUX channel) {
    adc.setCompareChannels(channel);
    return adc.getResult_V();
}

6.5.5 System Output and Analysis

Arduino Out

The output readings obtained from our system are as follows: - Ax (X-axis acceleration): Ranging from 1.39V to 1.91V - Ay (Y-axis acceleration): Ranging from 1.40V to 1.93V - Az (Z-axis acceleration): Ranging from 1.57V to 2.01V

The data showcases variations in acceleration detected by the ADXL335 accelerometer. As the system operates in continuous measurement mode, the ADC continuously samples and transmits data to the microcontroller, which then displays the results. The variations in Ax, Ay, and Az indicate changes in motion along the three axes, which can be correlated to tilting, rotation, or vibration of the sensor.

6.6 Signal and Interface Descriptions

Block Input Output Communication Protocol
ADXL335 3.3V Power, Motion Analog Voltage (X, Y, Z) Connected to ADS1115 Analog Inputs
ADS1115 Analog Signals 16-bit Digital Output I²C Communication
ESP8266 Digital Data (I²C) Processed Data via Serial USB (Laptop)

8 Practical Analysis of Delta-Sigma ADCs using LTspice

8.1 Simulation Approach

  1. 1st Order Modulator:
    • Designed with a single integrator, 1-bit quantizer, and feedback loop.
    • Simulated with a 80 Hz sine wave input and oversampling clock.
  2. 2nd Order Modulator:
    • Designed with dual integrators, 1-bit quantizer, and feedback loop.
    • Simulated under the same conditions for comparison.

8.2 Simulation and Output

  1. 1st Order Modulator:

Circuit Diagram

1st Order Delta Sigma Modulator

The DSM1 circuit comprises the following key components:

  • Input Stage: A sample-and-hold circuit controlled by non-overlapping clock signals (phi1 and phi2) samples the input signal (Vin).
  • Integrator: An op-amp integrator integrates the sampled input signal, generating an output voltage (vx1).
  • Quantizer: A comparator compares the integrator output (vx1) to a reference voltage (VCM) and produces a 1-bit digital output (vq).
  • Feedback Loop: The quantized output (vq) is fed back to the input stage, influencing the subsequent integration process.

Output Waveform Analysis

Transient Analysis of 1st Order Delta Sigma Modulator

The simulated output waveform reveals the following:

  • Input Signal: The input signal (Vin) is a sine wave, representing the analog input to the DSM1.
  • Integrator Output: The integrator output (vx1) is a ramp-like waveform that increases and decreases in response to the input signal. The slope of the ramp is determined by the input signal’s amplitude and polarity.
  • Quantized Output: The quantized output (vq) is a digital signal that switches between two levels (high and low). This digital output represents the quantized version of the input signal.

DSM1 Operation

The DSM1 operates as follows:

  • Sampling: The input signal is sampled at regular intervals determined by the clock signals phi1 and phi2.
  • Integration: The sampled input signal is integrated by the op-amp, resulting in a ramp-like voltage at the integrator’s output.
  • Quantization: The comparator compares the integrator’s output to the reference voltage. If the integrator’s output exceeds the reference, the comparator output goes high; otherwise, it stays low.
  • Feedback: The quantized output is fed back to the input stage, influencing the subsequent integration process and contributing to noise shaping.

Noise Shaping

The DSM1 employs noise shaping to improve its resolution. Noise shaping pushes the quantization noise to higher frequencies, allowing the signal of interest to be more accurately represented at lower frequencies.

Conclusion

The analysis demonstrates the fundamental operation of a 1st-order Delta-Sigma Modulator. The circuit effectively converts the analog input signal into a digital representation using integration, quantization, and feedback. The noise shaping technique inherent in the DSM1 architecture allows for improved resolution and signal fidelity.

  1. 2nd Order Modulator:

Circuit Diagram

2nd Order Delta Sigma Modulator

The DSM2 circuit consists of the following key elements:

  • Input Stage: A sample-and-hold circuit, controlled by non-overlapping clock signals (phi1 and phi2), samples the input signal (Vin).
  • First Integrator: An op-amp integrator integrates the sampled input signal, generating an output voltage (vx1).
  • Second Integrator: A second op-amp integrator integrates the output of the first integrator (vx1), producing a second integrated signal (vx2).
  • Quantizer: A comparator compares the output of the second integrator (vx2) to a reference voltage (VCM) and generates a 1-bit digital output (vq).
  • Feedback Loop: The quantized output (vq) is fed back to the input of the first integrator through a switch controlled by phi1 and phi2. This feedback loop plays a crucial role in noise shaping and overall performance.

Output Waveform Analysis

Transient Analysis of 2nd Order Delta Sigma Modulator

  • Input Signal (Vin): This is the original analog input signal to the DSM2. It can be any arbitrary waveform, but for simplicity, we consider a sine wave.

  • Integrator Outputs:

    • vx1 (Output of the First Integrator):
      • Expected to exhibit a ramp-like behavior.
      • The slope of the ramp will depend on the amplitude and polarity of the input signal.
      • Noise will be present due to the quantization process and the inherent noise of the op-amp.
    • vx2 (Output of the Second Integrator):
      • Will have a smoother waveform compared to vx1 due to the second integration stage.
      • Noise levels should be further reduced compared to the first integrator’s output.
      • The waveform may exhibit more complex shapes depending on the input signal and circuit parameters.

  • Quantized Output (vq):

    • This is the primary output of the DSM2.
    • It’s a digital signal switching between two levels (e.g., ‘0’ and ‘1’ or ‘high’ and ‘low’).
    • This bitstream represents the quantized version of the input signal.
    • Due to the noise shaping, the bitstream will appear more random and contain less low-frequency noise compared to a 1st-order DSM.

DSM2 Operation

The DSM2 operates as follows:

  1. Sampling: The input signal (Vin) is sampled at regular intervals determined by the clock signals phi1 and phi2.
  2. First-Stage Integration: The sampled input signal is integrated by the first op-amp, resulting in a ramp-like voltage (vx1) at its output.
  3. Second-Stage Integration: The output of the first integrator (vx1) is further integrated by the second op-amp, generating a second-order integrated signal (vx2).
  4. Quantization: The comparator compares the output of the second integrator (vx2) to the reference voltage (VCM). If vx2 exceeds VCM, the comparator output (vq) goes high; otherwise, it stays low.
  5. Feedback: The quantized output (vq) is fed back to the input stage, influencing the subsequent integration process and contributing to noise shaping.

Noise Shaping

  • The 2nd-order DSM’s key advantage is its enhanced noise shaping.
  • The cascading of two integrators pushes quantization noise to higher frequencies.
  • This means that the noise in the output bitstream is concentrated at frequencies above the signal band of interest.
  • This noise shaping is crucial for achieving higher resolution and improved dynamic range.

Advantages of 2nd-Order DSM

  • Higher Resolution: Due to improved noise shaping, the 2nd-order DSM generally achieves higher resolution compared to the 1st-order design.
  • Enhanced Performance: The 2nd-order architecture provides better dynamic range and lower distortion.

8.3 Conclusion

The 2nd-order Delta-Sigma Modulator is a sophisticated architecture that offers significant advantages over its 1st-order counterpart. By employing two cascaded integrators, it achieves enhanced noise shaping, higher resolution, and improved overall performance. The analysis and simulation of the DSM2 circuit are crucial for understanding its behavior, optimizing its design, and achieving desired performance in practical applications.

8.4 Findings

8.4.1 1st Order Delta-Sigma Modulator

  • Performance:
    • Moderate noise shaping observed.
    • Suitable for low-resolution applications.
  • Challenges:
    • Limited noise suppression at higher frequencies.
  • Industry Applications:
    • Audio ADCs (e.g., Texas Instruments PCM1808).
    • Low-power sensor interfaces.

8.4.2 2nd Order Delta-Sigma Modulator

  • Performance:
    • Improved noise shaping compared to 1st order.
    • Higher resolution achieved.
  • Challenges:
    • Increased complexity and stability concerns.
  • Industry Applications:
    • Precision measurement equipment.
    • High-resolution data acquisition systems.

8.4.3 Comparison of 1st and 2nd Order Modulators

Feature 1st Order Modulator 2nd Order Modulator
Noise Shaping Moderate Improved
Complexity Low Higher
Stability More stable Less stable
Applications Low-resolution ADCs High-resolution ADCs

8.5 Industry Applications and Case Studies

8.5.1 Audio Processing

  • Delta-Sigma ADCs are extensively used in audio applications due to their high resolution and noise shaping capabilities.
  • Example: Texas Instruments’ PCM1808 audio ADC.

8.5.2 Precision Measurement

  • High-order Delta-Sigma ADCs are employed in multimeters and data acquisition systems for accurate signal measurement.
  • Example: Analog Devices’ AD7124-8 precision ADC.

8.5.3 Sensor Interfaces

  • Industrial sensors, such as temperature and pressure sensors, often use Delta-Sigma ADCs for high-resolution signal conversion.
  • Example: Maxim Integrated’s MAX11270 for industrial sensor applications.

8.6 Challenges and Recommendations

8.6.1 Challenges

  1. Stability:
    • Higher-order modulators are prone to instability.
    • Requires careful design and tuning.
  2. Complexity:
    • Increased component count and design complexity for 2nd order modulators.
  3. Clock Jitter:
    • High clock frequencies can introduce jitter, affecting performance.

9 Design and Analysis of a 5-Transistor OTA in LTSpice

9.1 Introduction

Here we present the design, simulation, and analysis of a 5-Transistor Operational Transconductance Amplifier (5T OTA). The OTA was implemented in LTSpice using the 130nm bulk technology library provided by Hochschule Kempten. The primary objective was to replace the integrator opamp in the Delta-Sigma Modulator with the designed OTA and evaluate its performance.

9.2 OTA Design and Implementation

The design of the 5T OTA was based on the methodologies outlined in the Analog Circuit Design resource from Johannes Kepler University Linz. This reference provided essential guidelines for transistor sizing and biasing strategies.

The OTA topology consists of: - Input Differential Pair: - M1 & M2 (NMOS) – Convert input voltage difference into a current signal. - Current Mirror Load: - M5 & M6 (PMOS) – Implement a current mirror for a high-impedance load. - Tail Current Source & Biasing: - M3 & M4 (NMOS) – Provide tail current biasing for differential pair stability. - I1 – 20µA constant current source for biasing reference.

5T OTA

9.2.1 LTSpice Subcircuit for 5T OTA

.subckt ota_basic vdd Vinn Vinp vss Vout
I1 vdd N003 20µ
M1 N001 Vinp N002 0 NMOS l=5u w=2u
M2 Vout Vinn N002 0 NMOS l=5u w=2u
M3 N002 N003 vss vss NMOS l=5u w=0.5u
M4 N003 N003 vss vss NMOS l=5u w=2.5u
M5 N001 N001 vdd vdd PMOS l=5u w=1.5u
M6 Vout N001 vdd vdd PMOS l=5u w=1.5u
.ends ota_basic

9.3 Performance in Different Applications

9.3.1 Simple Comparator

  1. The OTA worked effectively, providing clear high/low transitions. Simple Comparator with 5T OTA and it’s transient analysis 2. DSM1 Circuit The OTA performed nearly identically to an ideal opamp, making it a viable replacement. DSM1 circuit with 5T OTA replacing the Integrator Opamp 3. Comparison Transient analysis of DSM1 with replaced Integrator Opamp
Feature Ideal Op-Amp Integrator 5T OTA Integrator
Integrator Output Linear, clean ramp Distorted, noisy, limited swing
Comparator Output Sharp, clean digital signal Noisy, jittery transitions
Noise Minimal Significant
Signal Swing Larger, utilizes full range Limited
Linearity Excellent Poor

9.3.1.1 Analysis

The significant difference in performance arises from the non-ideal characteristics of the 5T OTA compared to the ideal op-amp:

  • Finite Gain and Bandwidth: The 5T OTA has limited gain and bandwidth, leading to non-ideal integration behavior and reduced signal swing.
  • Non-Linearities: The 5T OTA exhibits non-linearities, especially for larger signal swings, distorting the integrated waveform.
  • Noise: The 5T OTA is more susceptible to noise due to factors like transistor mismatch and thermal noise, resulting in a noisy comparator output.

9.3.1.2 “Nearly the Same” Digital Output

While the general pattern of the digital output (V(vq) or V(Vx1)) appears similar in some respects (especially when considering long timescales or slowly varying inputs), a detailed examination reveals significant performance degradation with the 5T OTA:

  • Average Switching Frequency: The average switching frequency might be close, but the instantaneous switching times are much more irregular and noisy.
  • Noise and Distortion: Even if the pulse density seems similar, the noise and jitter in the 5T OTA output will severely impact the accuracy of the digital representation. This noise will be apparent in the frequency spectrum.
  • Performance Metrics: Metrics like SNR and THD will be drastically worse with the 5T OTA.

9.3.2 DSM2 Circuit

The OTA failed to meet performance requirements. DSM2, being a second-order modulator, has an additional level of feedback and increased complexity in its loop dynamics. A higher gain is often needed to maintain the accuracy of the feedback in DSM2.

10 Practical Analysis of Delta-Sigma ADCs and 5-OTA using xschem

10.1 1st Order Modulator Analysis

A 1st order modulator is a key building block in Sigma-Delta (ΣΔ) Analog-to-Digital Converters (ADCs). It is designed to shape quantization noise while providing high-resolution digital output. The circuit consists of four primary stages:

  1. Input Stage (Sampling Circuit)
  2. Integrator
  3. Quantizer (Comparator + Flip-Flop)
  4. Feedback Loop

The primary function of this modulator is to shape noise, improve signal resolution, and enable oversampling techniques for ADCs.

10.1.1 Circuit Diagram with Description

Circuit Diagram

10.1.1.1 Input Stage (Sampling Circuit)

  • The switched-capacitor network samples the input signal (Vin).
  • Clock Signals (p1 and p2) control the switching operation.
  • Sampling capacitor (C1) temporarily stores charge corresponding to the input voltage.

10.1.1.2 Integrator (Charge Accumulation)

  • The integrator accumulates the charge transferred by the switched capacitor.
  • The output voltage (Vo) represents the integrated version of Vin.
  • A gain element (E1) scales the output voltage appropriately.

10.1.1.3 Quantizer (Comparator + Flip-Flop)

  • The comparator (E2) compares Vo with a reference voltage (Vcmp).
  • The flip-flop latches the comparator output to generate a stable digital signal (Q).

10.1.1.4 Feedback Loop

  • The digital output (Q) is fed back to control the reference voltage.
  • This ensures error correction and stabilizes the modulator operation.

10.1.2 Waveform Analysis of First-Order Delta-Sigma Modulator (DSM1)

Waveform Analysis

10.1.2.1 Input Signal (Vi)

  • The input voltage (Vi) appears as a constant DC signal.
  • This input is sampled and processed by the switched-capacitor circuit before integration.

10.1.2.2 Integrator Output (Vo)

  • The integrator output (Vo) exhibits a staircase waveform, which is characteristic of charge accumulation over time.
  • When a threshold is reached, the output resets, creating periodic downward transitions.
  • This behavior is essential for the noise shaping mechanism.

10.1.2.3 Quantized Output (Q)

  • The quantized output (Q) is switches between high (1) and low (0) states, functioning as a 1-bit digital representation of Vo.
  • The comparator evaluates Vo against a threshold.When Vo crosses the threshold, Q flips between 1 and 0.
  • This binary sequence represents a digitized version of the input signal.

10.1.3 Operation of Each Stage

10.1.3.1 Sampling

  1. When p1 is HIGH, Vin is sampled onto C1.
  2. When p2 is HIGH, the stored charge is transferred, affecting Vx and Vo.

10.1.3.2 Integration

  • The capacitor moves charge from Vx to Vo, accumulating voltage over time.
  • This operation ensures continuous integration of the input signal.
  • The integrator filters high-frequency noise, crucial for noise shaping.

10.1.3.3 Quantization

  1. The comparator (E2) evaluates Vo against Vcmp.
  2. If Vo > Vcmp, the output goes HIGH, else it goes LOW.
  3. The flip-flop (x1) stabilizes this decision, preventing rapid oscillations.

10.1.3.4 Feedback

  • The feedback loop uses the digital output (Q) to adjust the reference voltage dynamically.
  • This action corrects quantization errors, ensuring accurate digitization.

10.1.4 Noise Shaping in the Modulator

  • Quantization noise is pushed to higher frequencies, improving in-band SNR.
  • Due to oversampling, low-frequency signals retain higher accuracy.
  • The integrator smooths the signal, ensuring high-resolution output.
  • The feedback mechanism minimizes error, contributing to effective noise shaping.

10.2 2nd Order Modulator Analysis

A second-order sigma-delta (ΣΔ) modulator extends the principles of a first-order modulator by introducing a second integrator, which enhances noise shaping and improves resolution. It is a fundamental block in high-resolution Analog-to-Digital Converters (ADCs), particularly in applications requiring high dynamic range and low quantization noise.

A second-order ΣΔ modulator consists of the following primary stages:

  1. Input Stage (Sampling Circuit)
  2. First Integrator
  3. Second Integrator
  4. Quantizer (Comparator + Flip-Flop)
  5. Feedback Loop

This design improves noise shaping performance by increasing the suppression of quantization noise at low frequencies.

10.2.1 Circuit Diagram with Description

Circuit Diagram

10.2.1.1 Input Stage (Sampling Circuit)

  • The switched-capacitor network samples the input signal (Vin).
  • Clock Phases (p1, p2) control the charge transfer process.
  • Sampling capacitor (C1) temporarily stores the charge representing Vin.

10.2.1.2 First Integrator

  • The first integrator accumulates charge from the input stage.
  • It acts as a low-pass filter, shaping quantization noise.
  • The integrator consists of an operational amplifier (Op-Amp) and a feedback capacitor (C2).
  • Output (Vo1) represents the first level of integration.

10.2.1.3 Second Integrator

  • The output of the first integrator is fed into the second integrator.
  • This stage further shapes the noise, improving quantization noise suppression.
  • The output (Vo2) is an enhanced version of Vo1, ensuring better noise shaping.

10.2.1.4 Quantizer (Comparator + Flip-Flop)

  • The comparator (E2) determines whether Vo2 is above or below a reference (Vcmp).
  • The flip-flop (x1) stabilizes the digital decision, preventing unintended toggling.
  • The output (Q) is a 1-bit representation of Vo2.

10.2.1.5 Feedback Loop

  • The digital output (Q) is fed back via a Digital-to-Analog Converter (DAC).
  • The feedback adjusts the reference voltage dynamically, reducing errors and improving stability.
  • The feedback is applied to both integrators, ensuring system stability and enhancing linearity.

10.2.2 Waveform Analysis of Second-Order Sigma-Delta Modulator

Waveform Analysis

10.2.2.1 Input Signal (Vi)

  • This is the original analog signal that is sampled and processed.
  • The signal is sampled and processed in discrete steps.

10.2.2.2 Integrator Outputs

10.2.2.2.1 Vo1 (Output of 1st Integrator)
- The first integrator accumulates the input signal, forming a **staircase pattern**.
- The output shows gradual upward and downward movement, reflecting charge accumulation and discharge.
- `Vo1` acts as a **low-pass filter**, preventing high-frequency noise from dominating.
- This signal represents the first level of **quantization noise shaping**.
10.2.2.2.2 Vo2 (Output of 2nd Integrator)
- Further smooths `Vo1`, providing additional **noise shaping**.
- The waveform appears more **oscillatory**, reflecting improved quantization noise suppression.
- The orange waveform is **less staircase-like than** `Vo1`, meaning that the second integration has smoothed out variations.

10.2.2.3 Quantized Output (Q)

  • The quantized signal (Q) alternates between 1 and 0, representing the digital version of the modulated input.
  • The comparator makes decisions based on Vo2, generating the digital output.
  • Rapid toggling indicates feedback-driven quantization.
  • The feedback loop ensures accurate digital representation.

10.2.3 Operation of Each Stage

10.2.3.1 Sampling

  1. When p1** is HIGH**, Vin is sampled onto C1.
  2. When p2** is HIGH**, the charge is transferred to the first integrator.

10.2.3.2 First Integration

  • The first integrator accumulates charge, integrating the input over time.
  • The output (Vo1) represents the summed charge, shaping quantization noise.

10.2.3.3 Second Integration

  • The second integrator further processes Vo1, adding another layer of noise shaping.
  • This stage ensures higher accuracy and better low-frequency noise suppression.

10.2.3.4 Quantization

  1. The comparator (E2) compares Vo2 with Vcmp.
  2. If Vo2 > Vcmp, the output is HIGH (1), else LOW (0).
  3. The flip-flop (x1) stabilizes the output to prevent spurious transitions.

10.2.3.5 Feedback Loop

  • The feedback DAC converts Q** back to an analog signal**.
  • This signal is subtracted from the input, reducing error and improving linearity.
  • The feedback is applied to both integrators, maintaining stability and dynamic range.

10.2.4 Noise Shaping in the Modulator

  • Quantization noise is pushed to even higher frequencies compared to a first-order modulator.
  • The integrators act as low-pass filters, ensuring high SNR and improved resolution.

10.2.5 Advantages Over First-Order Modulator

  • Improved Noise Shaping: Second-order modulation pushes more quantization noise to higher frequencies.
  • Higher Signal-to-Noise Ratio (SNR): Provides better SNR compared to a first-order modulator.
  • Enhanced Dynamic Range: Two integrators result in better suppression of low-frequency quantization noise.
  • Increased Effective Number of Bits (ENOB): More precise digital representation of analog signals.
  • Better Linearity: Reduces in-band noise and distortion effects, improving performance for high-precision applications.

10.3 Five-Transistor Operational Transconductance Amplifier (OTA)

10.3.1 Introduction

Here we present the design, simulation, and analysis of a 5-Transistor Operational Transconductance Amplifier (5T OTA). For the circuit simulation, we are using Xcshem for schematic entry and ngspice for simulation.The 130nm CMOS technology SG13G2 from IHP Microelectronics is used. The primary objective was to replace the integrator opamp in the Delta-Sigma Modulator with the designed OTA and evaluate its performance.

10.3.2 OTA Design and Implementation

The design of the 5T OTA was based on the methodologies outlined in the Analog Circuit Design resource from Johannes Kepler University. The Five-Transistor OTA is a fundamental building block in analog circuits, particularly in low-power and high-gain applications.

The 5T OTA comprises the following components:

The circuit consists of six MOSFETs (M1 to M6) and a bias current source (Ibias)

  1. Differential Input Pair (M1, M2)
    • Converts the differential input voltage into a current difference.
  2. Current Mirror Load (M3, M4)
    • Provides high gain by mirroring the current and acting as an active load.
  3. Tail Current Source (M5)
    • Sets a constant bias current for the differential pair.
  4. Biasing Circuit (M6)
    • Generates the required bias voltage for M5.
  5. Bias Current Source (Ibias)
    • Provides a stable current to the circuit. This current sets the transconductance of the OTA.

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10.3.3 Working of Each Component

10.3.3.1 Differential Input Pair (M1, M2)

  • M1 and M2 form an NMOS differential amplifier.
  • They receive differential inputs (Vin+ and Vin-).
  • The gate voltage difference (Vin+ - Vin-) modulates the drain currents of M1 and M2.
  • If Vin+ > Vin-, more current flows through M1, decreasing current through M2.

10.3.3.2 Current Mirror Load (M3, M4)

  • M3 and M4 form a PMOS current mirror, acting as an active load.
  • The current in one branch is mirrored in the other branch by matching the transistor sizes and ensuring similar operating conditions.
  • Converts the current difference of M1 and M2 into a voltage output.
  • Provides high output impedance, improving voltage gain.

10.3.3.3 Tail Current Source (M5)

  • M5 acts as a current source, ensuring a constant current bias for the differential pair.
  • Operates in saturation mode, ensuring that I(M1) + I(M2) = I_bias.
  • Improves common-mode rejection ratio (CMRR).

10.3.3.4 Biasing Circuit (M6)

  • M6 is responsible for biasing M5, ensuring a stable operating point.
  • It provides a reference current, ensuring correct biasing of the OTA.

10.3.4 Creating a Symbol in Xschem

To use the 5T OTA in a larger circuit, we create a symbol in Xschem.

10.3.4.1 Steps:

  1. Open Xschem and the OTA schematic.
  2. Click “Symbol” → “Make Symbol”.
  3. Modify the .sym file (arrange input/output pins).
  4. Save and use the symbol in new circuits.

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10.3.5 5T OTA Testbench and Performance Evaluation

10.3.6 Voltage Buffer with OTA

In order to design an OTA we need an application, and from this we derive the circuit specifications.We have used this OTA to function as a voltage buffer which lightly loads an input voltage source and can drive a large capacitive load.

In designing the OTA for this voltage buffer application, we have referred to the specifications outlined in the Analog Circuit Design resource. The key specifications are as follows:

image-3

10.3.6.1 Circuit Diagram with Description

image-4
  • OTA (Operational Transconductance Amplifier): The core component used to buffer the input voltage.
  • Input Voltage Source (Vin): Provides a DC bias of 0.8V with an AC signal for analysis.
  • Power Supply (Vdd = 1.5V, Vss = 0V): Supplies the OTA.
  • Capacitive Load (C1 = 50 fF): Represents the output load.
  • DC Analysis (dc Vin 0.7 0.9 0.01): Sweeps the input voltage from 0.7 to 0.9V in steps of 10mV.

10.3.6.2 Expected Waveform Analysis

image-5

Since the OTA is used as a voltage buffer, the ideal behavior would be: 𝑉out≈𝑉in

10.3.7 OTA as a Comparator

The circuit presented here utilizes an OTA in a comparator configuration where an AC signal is applied at the non-inverting input, and a reference voltage is provided at the inverting input. The output waveform reflects the behavior of a comparator, switching states based on the input conditions.

10.3.7.1 Circuit Diagram with Description

image-6

The given OTA circuit acts as a comparator. The configuration consists of: - Input Signal (Vin1): A sinusoidal signal of amplitude 0.8V and frequency 1kHz. - OTA Module (OTA_test): The core component acting as a comparator. - Reference Voltage (Vinn): A DC bias voltage of 0.4V. - Power Supply (Vdd): A 1.5V source powering the OTA. - Load Capacitor (50fF): A small capacitive load stabilizing the output.

10.3.7.2 Working Principle and Waveform

image-7

The OTA operates as a comparator where: - When Vinp > Vinn (0.4V), the output switches high (approximately Vdd = 1.5V). - When Vinp < Vinn (0.4V), the output switches low (approximately 0V). - The OTA amplifies the difference between Vinp and Vinn, pushing the output to either the supply rail or ground.

10.3.8 OTA as a Integrator

10.3.8.1 Circuit Diagram with Description

image-8

The given circuit consists of: - Input Voltage(Vin) A pulse waveform acting as the input signal. - Resistor (10kΩ) which converts the input voltage into current. - Capacitor (53pF) which integrates the current at the output. - OTA Block Acts as the active element performing integration. - Power supply of 1.5V.

The OTA operates as an integrator due to the capacitor connected at the output node. The input voltage difference is converted to current, which then charges the capacitor over time, producing an integrated output waveform. Ideally, the output should be a perfect triangular waveform corresponding to the integral of the square wave input.

10.3.8.2 Waveform Analysis

image-9

10.3.8.3 Expected Integrator Output:

  • Ideally, an integrator should produce a triangular wave when driven by a square wave input.
  • The integration process converts the high and low levels of the input pulse into a continuous increase or decrease in output voltage.

10.3.8.4 Observed Output:

  • The output waveform starts high and gradually decreases over time, rather than forming a clear triangular wave.
  • Instead of oscillating symmetrically, the output drifts downward, indicating a DC bias shift.

10.3.8.5 Reasons for Output Behavior

  • DC Bias Shift (Leakage Effects) The exponential downward drift indicates that the capacitor is losing charge over time.
  • OTA Non-Idealities Different design approaches need to be explored for OTA.

11 Conclusion

Delta-Sigma ADCs have proven to be a powerful and efficient solution for high-precision signal conversion. Their ability to reduce noise, improve resolution, and handle low-frequency signals makes them ideal for applications in medical devices, audio processing, and industrial sensors.

In this work, we explored the fundamentals of ADCs, the inner workings of Delta-Sigma Modulators, and their real-world applications. We also simulated a Delta-Sigma ADC system using key components like the ADXL335 accelerometer, ADS1115 ADC, and ESP8266 microcontroller, ensuring practical insights into how these systems function.

Through simulations in MATLAB, LTSpice, and Xschem, we analyzed different ADC architectures, comparing first and second-order Delta-Sigma Modulators to understand their trade-offs between accuracy, stability, and complexity.